University of Limerick Institutional Repository

High order mismatch shaping for low oversampling rates

DSpace Repository

Show simple item record O'Brien, Vincent Mullane, Brendan 2020-01-30T09:06:16Z 2020-01-30T09:06:16Z 2020
dc.identifier.citation O'Brien V.;Mullane B. (2020) 'High Order Mismatch Shaping for Low Oversampling Rates'. Ieee Transactions On Circuits And Systems Ii-Express Briefs, 67 (1):42-46. en_US
dc.identifier.issn 1549-7747
dc.description peer-reviewed en_US
dc.description.abstract Delta Sigma data converters employing high order dynamic element matching (DEM) allow for accurate signal conversion in the presence of DAC mismatch. However, at low oversampling rates, current high order DEM decoders provide little or no improvement in error suppression over lower order designs. In addition, the logic requirement of the DEM decoder increases significantly with each additional DAC bit. This brief presents a high order DEM decoder that improves mismatch shaping performance at low to medium oversampling rates by up to 15 dB, while employing methods to reduce the area overhead of the vector quantizer in the design. en_US
dc.language.iso eng en_US
dc.publisher IEEE Computer Society en_US
dc.relation.ispartofseries IEEE Transactions on Circuits and Systems II: Express Briefs;67 (1), pp 42-46
dc.rights © 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. en_US
dc.subject ADC en_US
dc.subject DAC en_US
dc.subject decoder en_US
dc.subject delta sigma (ΠΣ) en_US
dc.subject DEM en_US
dc.subject dynamic element matching en_US
dc.subject element selection logic en_US
dc.subject mismatch shaping en_US
dc.subject oversampling en_US
dc.title High order mismatch shaping for low oversampling rates en_US
dc.type info:eu-repo/semantics/article en_US
dc.type.supercollection all_ul_research en_US
dc.type.supercollection ul_published_reviewed en_US 2020-01-29T14:27:04Z
dc.description.version ACCEPTED
dc.identifier.doi 10.1109/TCSII.2019.2904180
dc.contributor.sponsor SFI
dc.contributor.sponsor EI
dc.relation.projectid IP-2013-0271
dc.relation.projectid 13/RC/2077
dc.rights.accessrights info:eu-repo/semantics/openAccess en_US
dc.internal.rssid 2940376
dc.internal.copyrightchecked Yes
dc.identifier.journaltitle Ieee Transactions On Circuits And Systems Ii-Express Briefs
dc.description.status peer-reviewed

Files in this item

This item appears in the following Collection(s)

Show simple item record

Search ULIR


My Account