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Managing hardware verification complexity with aspect-oriented model-driven engineering

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dc.contributor.author Linehan, Eamonn
dc.contributor.author Clarke, Siobhán
dc.date.accessioned 2011-01-26T16:12:58Z
dc.date.available 2011-01-26T16:12:58Z
dc.date.issued 2010
dc.identifier.uri http://hdl.handle.net/10344/666
dc.description peer-reviewed en_US
dc.description.abstract Recent advances in both the capabilities and accessibility of embedded systems have resulted in the potential to build increasingly complex systems that consequently are difficult to develop, test and deploy. Model-driven approaches raise the level of abstraction at which developers work, promising improved quality (reliability, safety, real-time properties) and increased productivity through automation. However, despite the increasing application of model-driven technologies to the development of embedded systems, little attention has been paid to the corresponding increase in complexity of verification environments for embedded systems. As system complexity has increased in recent years so has the complexity of hardware verification testbenches resulting in them becoming difficult to understand, maintain, extend and reuse across projects. This paper presents a new UML profile for the e verification language that enables the use of an aspect-oriented, model-driven approach for the design of verification testbenches. en_US
dc.language.iso eng en_US
dc.publisher DATE10 en_US
dc.relation.ispartofseries Proceedings from Workshop 6: Model Based Engineering for Embedded Systems Design. Design, Automation & Test in Europe (DATE10), Dresden, Germany, March 2010.;
dc.subject embedded systems en_US
dc.title Managing hardware verification complexity with aspect-oriented model-driven engineering en_US
dc.type Conference item en_US
dc.type.supercollection all_ul_research en_US
dc.type.supercollection ul_published_reviewed en_US
dc.type.restriction none en
dc.contributor.sponsor SFI
dc.relation.projectid 03/CE2/I303_1

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